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About this product
- Author(s)Igor M. Filanovsky,Vadim V. Ivanov
- PublisherSpringer-Verlag New York Inc.
- Date of Publication10/12/2010
- GenreElectronics Engineering & Communications Engineering
- Series TitleThe Springer International Series in Engineering and Computer Science
- Series Part/Volume Number763
- Place of PublicationNew York, NY
- Country of PublicationUnited States
- ImprintSpringer-Verlag New York Inc.
- Content Note6 black & white illustrations, biography
- Weight305 g
- Width156 mm
- Height234 mm
- Spine11 mm
- Format DetailsTrade paperback (US)
- Edition Statement1st ed. Softcover of orig. ed. 2004
- Table Of ContentsPreface. Notations. 1: Introduction. 1.1. Organization of the book. 1.2. Analog design steps and tools. 1.3. Modern analog processes. 1.4. Trends and requirements of the OpAmp design. 1.5. Essential parameters of bipolar and MOS transistors. 2: Structural design methodology. 2.1. Consider good circuits only. 2.2. System description and analysis with signal flow graphs. 2.3. Frequency stability in the multiloop system. 2.4. Elementary building cells. 2.5. Summary. 3: Biasing. 3.1. PTAT biasing circuits. 3.2. MOS gm-matching biasing. 3.3. Negative-TC and zero-TC current generators. 3.4. Current mirrors and sources. 3.5. Subregulated biasing. 3.6. Low-noise bootstrap charge pump. 3.7. Start-up circuits. 4: OpAmp gain structure, frequency compensation and stability. 4.1. Voltage and current gain boost. 4.2. Frequency compensation. 4.3. Rail-to-rail IO OpAmp structure. 5: Input stage. 5.1. Rail-to-rail input stages with stable gm. 5.2. CMRR/PSRR improvement. 5.3. Trimming techniques. 5.4. Offset and temperature drift trimming. 5.5. Input protection. 6: Intermediate amplification stages. 6.1. Floating current source. 6.2. Current mirrors of the folded cascode. 6.3. Direct voltage gain boost in folded cascode. 6.4. Voltage gain boost utilizing current mirrors. 6.5. Voltage follower. 7: Class AB output stage. 7.1. Class AB stage structure. 7.2. Generation andimprovement of class AB circuits. 8: Special functions. 8.1. Startup and shutdown. 8.2. Temperature shutdown. 8.3. Output current limiting. 8.4. Slew rate enhancement. 8.5. Overload recovery. 9: From structure to circuit. 9.1. General considerations of transistor sizing and biasing. 9.2. Design step one: input and output devices and currents. 9.3. Folded cascode. 9.4. Class AB output stage. 9.5. Gain boost and folded cascode current source. 9.6. Biasing. 9.7. Finale of the amplifier design. Appendix: Structural properties and linear transformations in the multidimensional systems with symmetric links. References. Index.
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