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Verilog Coding for Logic Synthesis, Hardcover by Lee, Weng Fook, Brand New, F...

US $173.33
Approximately£130.40
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eBay item number:365544508724
Last updated on 06 May, 2025 00:53:44 BSTView all revisionsView all revisions

Item specifics

Condition
New: A new, unread, unused book in perfect condition with no missing or damaged pages. See the ...
Book Title
Verilog Coding for Logic Synthesis
ISBN
9780471429760

About this product

Product Identifiers

Publisher
Wiley & Sons, Incorporated, John
ISBN-10
0471429767
ISBN-13
9780471429760
eBay Product ID (ePID)
2302156

Product Key Features

Number of Pages
310 Pages
Language
English
Publication Name
Verilog Coding for Logic Synthesis
Publication Year
2003
Subject
Electronics / Circuits / Logic, Electronics / Circuits / Vlsi & Ulsi, Electronics / Digital, Logic Design
Type
Textbook
Author
Weng Fook Lee
Subject Area
Computers, Technology & Engineering
Format
Hardcover

Dimensions

Item Height
0.9 in
Item Weight
23.3 Oz
Item Length
9.4 in
Item Width
6.5 in

Additional Product Features

Intended Audience
Scholarly & Professional
LCCN
2002-032433
Dewey Edition
21
Illustrated
Yes
Dewey Decimal
621.39/5
Table Of Content
Table of Figures. Table of Examples. List of Tables. Preface. Acknowledgments. Trademarks. Introduction. Asic Design Flow. Verilog Coding. Coding Style: Best-Known Method for Synthesis. Design Example of Programmable Timer. Design Example of Programmable Logic Block for Peripheral Interface.
Synopsis
Provides a practical approach to Verilog design and problem solving. * Bulk of the book deals with practical design problems that design engineers solve on a daily basis. * Includes over 90 design examples. * There are 3 full scale design examples that include specification, architectural definition, micro-architectural definition, RTL coding, testbench coding and verification. * Book is suitable for use as a textbook in EE departments that have VLSI courses, Verilog is a Hardware Description Language (HDL) used to design and document electronic systems. Verilog HDL allows designers to virtually design systems without expending time or resources on physical models. It is the most widely used HDL with a user community of more than 50,000 active designers., A practical introduction to writing synthesizable Verilog code Rapid change in IC chip complexity and the pressure to design more complex IC chips at a faster pace has forced design engineers to find a more efficient and productive method to create schematics with large amounts of logic gates. This has led to the development of Verilog; one of the two types of Hardware Description Language (HDL) currently used in the industry. Verilog Coding for Logic Synthesis is a practical text that has been written specifically for students and engineers who are interested in learning how to write synthesizable Verilog code. Starting with simple verilog coding and progressing to complex real-life design examples, Verilog Coding for Logic Synthesis prepares you for a variety of situations that are bound to occur while utilizing Verilog. Expert design engineer Weng Fook Lee: Introduces the usage of Verilog and VHDL Describes a design flow for ASIC design Discusses basic concepts of Verilog coding Explores the common practices and coding style that are used when coding for synthesis and shows you the common coding style on Verilog operators Explains how a design project of a programmable timer is implemented Reveals the design of a programmable logic block for peripheral interface Filled with practical advice, functional flowcharts and waveforms, and over ninety examples, Verilog Coding for Logic Synthesis will help you fully understand the concepts and coding style of important industry language.
LC Classification Number
TK7868.D5L42 2003

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