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Design of Low-Power Coarse-Grained Reconfigurable Archi - Paperback NEW Vincent

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Located in: PR9 8QH SOUTHPORT UK, United Kingdom
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eBay item number:394604118865
Last updated on 27 Apr, 2024 07:53:06 BSTView all revisionsView all revisions

Item specifics

Condition
New: A new, unread, unused book in perfect condition with no missing or damaged pages. See the ...
Weight
452
Subjects
Computer & IT
Pages
662 Pages
Size
H:234mm, W:
Topic
Computing
Book Title
Design of Low-Power Coarse-Grained Reconfigurable Architectures
ISBN
9781138113527
Publication Year
2017
Type
Textbook
Format
Paperback
Language
English
Publication Name
Design of Low-Power Coarse-Grained Reconfigurable Architectures
Item Height
234mm
Author
Rabi N. Mahapatra, Yoonjin Kim
Publisher
Taylor & Francis LTD
Item Width
156mm
Subject
Engineering & Technology, Physics
Item Weight
340g
Number of Pages
223 Pages

About this product

Product Information

Coarse-grained reconfigurable architecture (CGRA) has emerged as a solution for flexible, application-specific optimization of embedded systems. Helping you understand the issues involved in designing and constructing embedded systems, Design of Low-Power Coarse-Grained Reconfigurable Architectures offers new frameworks for optimizing the architecture of components in embedded systems in order to decrease area and save power. Real application benchmarks and gate-level simulations substantiate these frameworks. The first half of the book explains how to reduce power in the configuration cache. The authors present a low-power reconfiguration technique based on reusable context pipelining that merges the concept of context reuse into context pipelining. They also propose dynamic context compression capable of supporting required bits of the context words set to enable and the redundant bits set to disable. In addition, they discuss dynamic context management for reducing power consumption in the configuration cache by controlling a read/write operation of the redundant context words. Focusing on the design of a cost-effective processing element array to reduce area and power consumption, the second half of the text presents a cost-effective array fabric that uniquely rearranges processing elements and their interconnection designs. The book also describes hierarchical reconfigurable computing arrays consisting of two reconfigurable computing blocks with two types of communication structure. The two computing blocks share critical resources, offering an efficient communication interface between them and reducing the overall area. The final chapter takes an integrated approach to optimization that draws on the design schemes presented in earlier chapters. Using a case study, the authors demonstrate the synergy effect of combining multiple design schemes.

Product Identifiers

Publisher
Taylor & Francis LTD
ISBN-13
9781138113527
eBay Product ID (ePID)
20046594847

Product Key Features

Author
Rabi N. Mahapatra, Yoonjin Kim
Publication Name
Design of Low-Power Coarse-Grained Reconfigurable Architectures
Format
Paperback
Language
English
Subject
Engineering & Technology, Physics
Publication Year
2017
Type
Textbook
Number of Pages
223 Pages

Dimensions

Item Height
234mm
Item Width
156mm
Item Weight
340g

Additional Product Features

Title_Author
Rabi N. Mahapatra, Yoonjin Kim
Country/Region of Manufacture
United Kingdom

Item description from the seller

Business seller information

Charlies Chapters Ltd
Charles Sword
81 Balmoral Drive
SOUTHPORT
Merseyside
PR9 8QH
United Kingdom
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:liamEku.oc.sretpahcseilrahc@skoobwontiyub
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Value added tax number:
  • GB 920245361
Company registration number:
  • 06386895
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The book is in very good condition. The package got broken during transport, but the book remained intact. (A plastic bag, added to the carton envelope, would complete the package as it would protect the book against any possible contact with liquids.)

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