Product Information
Model order reduction (MOR) techniques reduce the complexity of VLSI designs, paving the way to higher operating speeds and smaller feature sizes. This book presents a systematic introduction to, and treatment of, the key MOR methods employed in general linear circuits, using real-world examples to illustrate the advantages and disadvantages of each algorithm. Following a review of traditional projection-based techniques, coverage progresses to more advanced MOR methods for VLSI design, including HMOR, passive truncated balanced realization (TBR) methods, efficient inductance modeling via the VPEC model, and structure-preserving MOR techniques. Where possible, numerical methods are approached from the CAD engineer's perspective, avoiding complex mathematics and allowing the reader to take on real design problems and develop more effective tools. With practical examples and over 100 illustrations, this book is suitable for researchers and graduate students of electrical and computer engineering, as well as practitioners working in the VLSI design industry.Product Identifiers
PublisherCambridge University Press
ISBN-139780521865814
eBay Product ID (ePID)11046689019
Product Key Features
Number of Pages260 Pages
Publication NameAdvanced Model Order Reduction Techniques in Vlsi Design
LanguageEnglish
Publication Year2007
TypeTextbook
Subject AreaElectrical Engineering
AuthorLei He, Sheldon Tan
FormatHardcover
Dimensions
Item Height255 mm
Item Weight680 g
Additional Product Features
Country/Region of ManufactureUnited Kingdom
Title_AuthorSheldon Tan, Lei He