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Electromigration Modeling at Circuit Layout Level by Cher Ming Tan, Feifei He (Paperback, 2013)

About this product

Product Information

Integrated circuit (IC) reliability is of increasing concern in present-day IC technology where the interconnect failures significantly increases the failure rate for ICs with decreasing interconnect dimension and increasing number of interconnect levels. Electromigration (EM) of interconnects has now become the dominant failure mechanism that determines the circuit reliability. This brief addresses the readers to the necessity of 3D real circuit modelling in order to evaluate the EM of interconnect system in ICs, and how they can create such models for their own applications. A 3-dimensional (3D) electro-thermo-structural model as opposed to the conventional current density based 2-dimensional (2D) models is presented at circuit-layout level.

Product Identifiers

PublisherSpringer Verlag, Singapore
ISBN-139789814451208
eBay Product ID (ePID)141579954

Product Key Features

Number of Pages103 Pages
Publication NameElectromigration Modeling at Circuit Layout Level
LanguageEnglish
SubjectEngineering & Technology, Physics
Publication Year2013
TypeTextbook
Subject AreaMaterial Science
AuthorCher Ming Tan, Feifei He
FormatPaperback

Dimensions

Item Height235 mm
Item Weight1883 g
Item Width155 mm

Additional Product Features

Country/Region of ManufactureSingapore
Title_AuthorCher Ming Tan, Feifei He
Series TitleSpringerbriefs in Applied Sciences and Technology