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Verification Methodology Manual for SystemVerilog by Andy Nightingale, Eduard Cerny, Janick Bergeron, Alan Hunter (Paperback, 2014)
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ISBN-13: 9781461498131, 978-1461498131. Author(s): Janick Bergeron, Eduard Cerny, Alan Hunter, Andy Nightingale.
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About this product
Product Information
Offers users the first resource guide that combines both the methodology and basics of SystemVerilog Addresses how all these pieces fit together and how they should be used to verify complex chips rapidly and thoroughly. Unique in its broad coverage of SystemVerilog, advanced functional verification, and the combination of the two.Product Identifiers
PublisherSpringer-Verlag New York Inc.
ISBN-139781461498131
eBay Product ID (ePID)213289002
Product Key Features
Number of Pages503 Pages
Publication NameVerification Methodology Manual for Systemverilog
LanguageEnglish
SubjectEngineering & Technology, Computer Science, Physics
Publication Year2014
TypeTextbook
Subject AreaElectrical Engineering
AuthorAndy Nightingale, Eduard Cerny, Janick Bergeron, Alan Hunter
FormatPaperback
Dimensions
Item Height235 mm
Item Weight795 g
Item Width155 mm
Additional Product Features
Country/Region of ManufactureUnited States
Title_AuthorAndy Nightingale, Alan Hunter, Eduard Cerny, Janick Bergeron
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