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About this product
Product Identifiers
PublisherSpringer International Publishing A&G
ISBN-103030359700
ISBN-139783030359706
eBay Product ID (ePID)2309453476
Product Key Features
Book TitleDeep In-Memory Architectures for Machine Learning
Number of PagesX, 174 Pages
LanguageEnglish
Publication Year2020
TopicElectronics / Circuits / General, Electronics / General, Cybernetics
IllustratorYes
GenreComputers, Technology & Engineering
AuthorMingu Kang, Naresh R. Shanbhag, Sujan Gonugondla
FormatHardcover
Dimensions
Item Weight16 Oz
Item Length9.3 in
Item Width6.1 in
Additional Product Features
Number of Volumes1 vol.
Table Of ContentIntroduction.- The Deep In-memory Architecture (DIMA).- DIMA Prototype Integrated Circuits.- A Variation-Tolerant DIMA via On-Chip Training.- Mapping Inference Algorithms to DIMA.- PROMISE: A DIMA-based Accelerator.- Future Prospects.- Index.
Synopsis1 Introduction1.1 The Energy Problem in Machine Learning1.2 Digital ML Architectures1.3 In-memory ML Architectures1.4 Book Organization2 The Deep In-memory Architecture (DIMA)2.1 Data-flow of Machine Learning Algorithms2.2 DIMA Overview2.3 Inference Architectures: A Shannon-inspired Perspective2.4 DIMA Design Guidelines and Techniques2.5 DIMA Models of Energy, Delay, and Accuracy2.6 ConclusionAppendices3 DIMA Prototype Integrated Circuits3.1 The Multi-Functional DIMA IC3.2 Measured Results3.3 Random Forest (RF) DIMA IC3.4 Random Forest IC Prototype3.5 Measured Results3.6 Conclusion4 A Variation-Tolerant DIMA via On-Chip Training4.1 Background and Rationale4.2 Architecture and Circuit Implementation4.3 Experimental Results4.4 Conclusion5 Mapping Inference Algorithms to DIMA5.1 Convolutional Neural Network (CNN)5.2 Mapping CNN on DIMA (DIMA-CNN)5.3 Energy, Delay, and Functional Models of DIMA-CNN5.4 Simulation and Results5.5 Sparse Distributed Memory (SDM)5.6 DIMA-based SDM Architecture (DIMA-SDM)5.7 Energy, Delay, and Functional Models of DIMA-SDM5.8 Simulation Results5.9 Conclusions6 PROMISE: A DIMA-based Accelerator6.1 Background6.2 DIMA Instruction Set Architecture6.3 Compiler6.4 Validation Methodology6.5 Evaluation6.6 Conclusion7 Future ProspectsIndex, This book describes the recent innovation of deep in-memory architectures for realizing AI systems that operate at the edge of energy-latency-accuracy trade-offs. From first principles to lab prototypes, this book provides a comprehensive view of this emerging topic for both the practicing engineer in industry and the researcher in academia. The book is a journey into the exciting world of AI systems in hardware.