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Materials, Circuits and Devices Ser.: Analysis and Design of CMOS Clocking Circuits for Low Phase Noise by Deog-Kyoon Jeong and Woorham Bae (2020, Hardcover)
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The book begins by introducing the theory of Fourier transform and power spectral density, then builds on this foundation in chapter 2 to define phase noise and jitter. Chapters 5-7 cover conventional clocking circuits; phase-locked loop (PLL) and delay-locked loop (DLL), which suppress the phase noise of CMOS oscillators.
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About this product
Product Identifiers
PublisherInstitution of Engineering & Technology
ISBN-101785618016
ISBN-139781785618017
eBay Product ID (ePID)2320087447
Product Key Features
Number of Pages256 Pages
Publication NameAnalysis and Design of Cmos Clocking Circuits for Low Phase Noise
LanguageEnglish
SubjectEngineering (General), Electronics / Circuits / Integrated
Publication Year2020
TypeTextbook
AuthorDeog-Kyoon Jeong, Woorham Bae
Subject AreaTechnology & Engineering
SeriesMaterials, Circuits and Devices Ser.
FormatHardcover
Dimensions
Item Length9.2 in
Item Width6.1 in
Additional Product Features
Intended AudienceCollege Audience
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