Table Of ContentPART 1: FUNDAMENTALS Chapter 1: The Evolution of Network Technology: Distributed Computing and the Convergence of Networks Chapter 2: Network Processors: Justification Chapter 3: Packet Processing PART 2: NETWORK PROCESSOR ARCHITECTURE Chapter 4: IBM PowerNP(tm) Chapter 5: Intel IXA(tm) Network Processors Chapter 6: AMCC nP(tm) Family of Network Processors Chapter 7: Agere PayloadPlus(r) Family of Network Processors Chapter 8: Motorola's C-Port(tm) Family of Network Processors Chapter 9: Other NPU Architectures Chapter 10: Alternative Approaches to Network Processing: Net ASICs and Designing with IP Cores PART 3: PERIPHERAL CHIPS SUPPORTING NETWORK PROCESSORS: STORAGE PROCESSORS, CLASSIFICATION PROCESSORS, SEARCH ENGINES, SWITCH FABRICS, AND TRAFFIC MANAGERS Chapter 11: Storage Network Processors (SNPs) Chapter 12: Search Engines Chapter 13: Classification Processors Chapter 14: Switch Fabrics Chapter 15: Traffic Managers PART 4: PUTTING EVERYTHING TOGETHER Chapter 16: Systems Engineering Issues PART 5: SECURITY COPROCESSORS Chapter 17: Security Coprocessors LIST OF ACRONYMS APPENDIX I: OVERVIEW OF NETWORK-PROCESSOR PRODUCTS AND PLATFORMS APPENDIX II: TYPICAL TRAFFIC LOAD (in Millions of Packets per Second) CORRESPONDENCE AT VARIOUS LINK SPEEDS AND PACKET SIZES APPENDIX III: STANDARDIZATION EFFORTS IN NETWORK PROCESSING INDEX
SynopsisPublisher's Note: Products purchased from Third Party sellers are not guaranteed by the publisher for quality, authenticity, or access to any online entitlements included with the product. Explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations Network processing units (NPUs) will be the occasion of sweeping changes in the network hardware industry over the next few years. This new breed of microchip impacts chip designers like Intel, equipment vendors like Cisco, application developers like IBM and Morotola, and an army of software engineers who spent the last decade working on protocols and network management solutions.A thoroughly practical dissection of the early NPU market, this designer's guide explains how network processors work and provides detailed information on all major commercial architectures, from features to design considerations. Comparative tables are a rich source of cross-industry info. Coverage includes traffic managers, classification chips, content-addressable memories, switch fabrics, security accelerators, storage coprocessors and NetASICs.